Visualize circuit timing

Package versions

The code on this page was developed using the following requirements. We recommend using these versions or newer.

qiskit[all]~=2.3.0
qiskit-ibm-runtime~=0.43.1

In addition to visualizing instructions on a circuit, you might want to visualize a circuit's scheduling by using the Qiskit timeline_drawer method. This visualization could help you to quickly spot idling time on qubits, for example. However, this method does not return accurate results for dynamic circuits. To visualize dynamic circuit scheduling, use the draw_circuit_schedule_timing method, as described in the Qiskit Runtime support section.

Examples

To visualize a scheduled circuit program, you can call this function with a set of control arguments. Most of the output image's appearance can be modified by a stylesheet, but this is not required.

Draw with the default stylesheet

from qiskit import QuantumCircuit
from qiskit.visualization.timeline import draw
from qiskit.providers.fake_provider import GenericBackendV2
from qiskit.transpiler import generate_preset_pass_manager
 
qc = QuantumCircuit(2)
qc.h(0)
qc.cx(0, 1)
 
backend = GenericBackendV2(5)
 
pm = generate_preset_pass_manager(backend=backend, optimization_level=1)
isa_circuit = pm.run(qc)
 
draw(isa_circuit, target=backend.target)

Output:

Draw with a stylesheet suited for program debugging

from qiskit import QuantumCircuit
from qiskit.visualization.timeline import draw, IQXDebugging
from qiskit.providers.fake_provider import GenericBackendV2
from qiskit.transpiler import generate_preset_pass_manager
 
qc = QuantumCircuit(2)
qc.h(0)
qc.cx(0, 1)
qc.measure_all()
 
backend = GenericBackendV2(5)
pm = generate_preset_pass_manager(backend=backend, optimization_level=1)
isa_circuit = pm.run(qc)
draw(isa_circuit, style=IQXDebugging(), target=backend.target)

Output:

You can create custom generator or layout functions and update an existing stylesheet with the custom functions. This way, you can control most of the appearance of the output image without modifying the codebase of the scheduled circuit drawer. See the timeline_drawer API reference for more examples.

Qiskit Runtime support

While the timeline drawer built in to Qiskit is useful for static circuits, it might not accurately reflect the timing of dynamic circuits because of implicit operations such as broadcasting and branch determination. As part of dynamic circuit support, Qiskit Runtime returns the accurate circuit timing information inside the job results when requested.

Notes

This is an experimental function. It is in preview release status and is therefore subject to change.
This function only applies to Qiskit Runtime Sampler jobs.
Although the total circuit time is returned in the "compilation" metadata, this is NOT the time used for billing (quantum time).

Enable timing data retrieval

To enable timing data retrieval, set the experimental scheduler_timing flag to True when running the primitive job.

from qiskit_ibm_runtime import QiskitRuntimeService, SamplerV2
 
service = QiskitRuntimeService()
backend = service.least_busy(operational=True, simulator=False)
 
pm = generate_preset_pass_manager(backend=backend, optimization_level=1)
isa_circuit = pm.run(qc)
 
sampler = SamplerV2(backend)
sampler.options.experimental = {
    "execution": {
        "scheduler_timing": True,
    },
}
 
sampler_job = sampler.run([isa_circuit])
result = sampler_job.result()

Access the circuit timing data

When requested, the circuit timing data for each PUB is returned in the job result metadata, under ["compilation"]["scheduler_timing"]["timing"]. This field contains the raw timing information. To display the timing information, use the built-in visualization tool, as described in the Visualize the timings section.

Use the following code to access the circuit timing data for the first PUB:

job_result = sampler_job.result()
circuit_schedule = job_result[0].metadata["compilation"]["scheduler_timing"]
circuit_schedule_timing = circuit_schedule["timing"]

Understand the raw timing data

While visualizing the circuit timing data by using the draw_circuit_schedule_timing method is the most common use case, it might be useful to understand the structure of the raw timing data returned. This could help you, for example, to extract information programmatically.

The timing data returned in ["compilation"]["scheduler_timing"]["timing"] is a list of strings. Each string represents a single instruction on some channel and is comma-separated into the following data types:

Branch - Determines whether the instruction is in a control flow (then / else) or a main branch.
Instruction - The gate and the qubit to operate on.
Channel - The channel that is being assigned with the instruction. It can be one of the following:
- Qubit x - The drive channel for qubit x.
- AWGRx_y (arbitrary waveform generator readout) - Used by readout channels to communicate when measuring qubits. The x and y arguments correspond to the readout instrument ID and the qubit number, respectively.
T0 - The instruction start time within the complete schedule
Duration - The instruction's duration, in units of dt seconds, where 1 dt = 1 scheduling cycle. You can find the dt value of a backend by using backend.dt.
Pulse - The type of pulse operation being used.

Example:

main,barrier,Qubit 0,7,0,barrier # A barrier on the main branch on qubit 0 at time 7 with 0 duration
main,reset_0,Qubit 0,7,64,play # A reset instruction on the main branch on qubit 0 at time 7 with duration 64 and a play operation
...

Visualize the timings

With qiskit-ibm-runtime v0.43.0 or later, you can visualize circuit timings. To visualize the timings, you first need to convert the result metadata to fig by using the draw_circuit_schedule_timing method. This method returns a plotly figure, which you can display directly, save to a file, or both. For more information about the plotly commands to use, see fig.show() and fig.write_image("<path.format>").

from qiskit_ibm_runtime.visualization import draw_circuit_schedule_timing
 
# Create a figure from the metadata
fig = draw_circuit_schedule_timing(
    circuit_schedule=circuit_schedule_timing,
    included_channels=None,
    filter_readout_channels=False,
    filter_barriers=False,
    width=1000,
)
 
# Uncomment the following line to display the figure
# fig.show(renderer="notebook")
 
# Save to a file
# fig.write_html("scheduler_timing.html")

Hovering over the output shows information such as the start, finish, and duration. — Example of a generated figure

Understand the generated figure

The image of the circuit timing data output by draw_circuit_schedule_timing conveys the following information:

X axis is time in units of dt seconds, where 1 dt = 1 scheduling cycle. You can find the dt value of a backend by using backend.dt.
Y axis is the channel (think of channels as instruments that emit pulses).
- Receive channel - The only channel that isn't an instrument by itself. It is an instruction played on all channels that are part of a communication procedure with the hub at that time.
- Qubit x - The drive channel for qubit x.
- AWGRx_y (arbitrary waveform generator readout) - Used by readout channels to communicate when measuring qubits. The x and y arguments correspond to the readout instrument ID and the qubit number, respectively.
- Hub - Controls broadcasting.

Additionally, each instruction has the format of X_Y, where X is the name of the instruction and Y is the pulse type. A play type applies control pulses, and a capture records the qubit's state. You can also hover over each instruction to get more details. For example, the previous figure shows a control pulse for the X gate applied to qubit 10 at 1161 dt.

End-to-end example

This example shows you how to enable the option, get the circuit timing information from the metadata, and display it as an image.

First, set up the environment, define the circuits and convert them to ISA circuits, and define and run the jobs.

from qiskit_ibm_runtime import SamplerV2, QiskitRuntimeService
from qiskit.circuit import QuantumCircuit, QuantumRegister, ClassicalRegister
from qiskit.transpiler import generate_preset_pass_manager
 
service = QiskitRuntimeService()
backend = service.least_busy(operational=True, simulator=False)
 
# Create a dynamic circuit
 
qubits = QuantumRegister(1)
clbits = ClassicalRegister(1)
qc = QuantumCircuit(qubits, clbits)
(q0,) = qubits
(c0,) = clbits
 
qc.h(q0)
qc.measure(q0, c0)
with qc.if_test((c0, 1)):
    qc.x(q0)
qc.measure(q0, c0)
 
# Convert to an ISA circuit for the given backend
 
pm = generate_preset_pass_manager(backend=backend, optimization_level=1)
isa_circuit = pm.run(qc)
 
# Generate samplers for backend targets
sampler = SamplerV2(backend)
sampler.options.experimental = {"execution": {"scheduler_timing": True}}
 
# Submit jobs
sampler_job = sampler.run([isa_circuit])
result = sampler_job.result()
 
print(
    f">>> {' Job ID:':<10}  {sampler_job.job_id()} ({sampler_job.status()})"
)

Output:

>>>  Job ID:    d5kk3cn853es738e01dg (DONE)

Next, get the circuit schedule timing:

# Get the circuit schedule timing
result[0].metadata["compilation"]["scheduler_timing"]["timing"]

Output:

'main,rz_0,Qubit 0,929,0,shift_phase\nmain,sx_0,Qubit 0,929,8,play\nmain,sx_0,Qubit 0,933,0,shift_phase\nmain,rz_0,Qubit 0,937,0,shift_phase\nmain,barrier,Qubit 0,937,0,barrier\nmain,barrier,Qubit 0,937,0,barrier\nmain,barrier,Qubit 1,937,0,barrier\nmain,barrier,Qubit 2,937,0,barrier\nmain,barrier,Qubit 3,937,0,barrier\nmain,barrier,Qubit 4,937,0,barrier\nmain,barrier,Qubit 5,937,0,barrier\nmain,barrier,Qubit 6,937,0,barrier\nmain,barrier,Qubit 7,937,0,barrier\nmain,barrier,Qubit 8,937,0,barrier\nmain,barrier,Qubit 9,937,0,barrier\nmain,barrier,Qubit 10,937,0,barrier\nmain,barrier,Qubit 11,937,0,barrier\nmain,barrier,Qubit 12,937,0,barrier\nmain,barrier,Qubit 13,937,0,barrier\nmain,barrier,Qubit 14,937,0,barrier\nmain,barrier,Qubit 15,937,0,barrier\nmain,barrier,Qubit 16,937,0,barrier\nmain,barrier,Qubit 17,937,0,barrier\nmain,barrier,Qubit 18,937,0,barrier\nmain,barrier,Qubit 19,937,0,barrier\nmain,barrier,Qubit 20,937,0,barrier\nmain,barrier,Qubit 21,937,0,barrier\nmain,barrier,Qubit 22,937,0,barrier\nmain,barrier,Qubit 23,937,0,barrier\nmain,barrier,Qubit 24,937,0,barrier\nmain,barrier,Qubit 25,937,0,barrier\nmain,barrier,Qubit 26,937,0,barrier\nmain,barrier,Qubit 27,937,0,barrier\nmain,barrier,Qubit 28,937,0,barrier\nmain,barrier,Qubit 29,937,0,barrier\nmain,barrier,Qubit 30,937,0,barrier\nmain,barrier,Qubit 31,937,0,barrier\nmain,barrier,Qubit 32,937,0,barrier\nmain,barrier,Qubit 33,937,0,barrier\nmain,barrier,Qubit 34,937,0,barrier\nmain,barrier,Qubit 35,937,0,barrier\nmain,barrier,Qubit 36,937,0,barrier\nmain,barrier,Qubit 37,937,0,barrier\nmain,barrier,Qubit 38,937,0,barrier\nmain,barrier,Qubit 39,937,0,barrier\nmain,barrier,Qubit 40,937,0,barrier\nmain,barrier,Qubit 41,937,0,barrier\nmain,barrier,Qubit 42,937,0,barrier\nmain,barrier,Qubit 43,937,0,barrier\nmain,barrier,Qubit 44,937,0,barrier\nmain,barrier,Qubit 45,937,0,barrier\nmain,barrier,Qubit 46,937,0,barrier\nmain,barrier,Qubit 47,937,0,barrier\nmain,barrier,Qubit 48,937,0,barrier\nmain,barrier,Qubit 49,937,0,barrier\nmain,barrier,Qubit 50,937,0,barrier\nmain,barrier,Qubit 51,937,0,barrier\nmain,barrier,Qubit 52,937,0,barrier\nmain,barrier,Qubit 53,937,0,barrier\nmain,barrier,Qubit 54,937,0,barrier\nmain,barrier,Qubit 55,937,0,barrier\nmain,barrier,Qubit 56,937,0,barrier\nmain,barrier,Qubit 57,937,0,barrier\nmain,barrier,Qubit 58,937,0,barrier\nmain,barrier,Qubit 59,937,0,barrier\nmain,barrier,Qubit 60,937,0,barrier\nmain,barrier,Qubit 61,937,0,barrier\nmain,barrier,Qubit 62,937,0,barrier\nmain,barrier,Qubit 63,937,0,barrier\nmain,barrier,Qubit 64,937,0,barrier\nmain,barrier,Qubit 65,937,0,barrier\nmain,barrier,Qubit 66,937,0,barrier\nmain,barrier,Qubit 67,937,0,barrier\nmain,barrier,Qubit 68,937,0,barrier\nmain,barrier,Qubit 69,937,0,barrier\nmain,barrier,Qubit 70,937,0,barrier\nmain,barrier,Qubit 71,937,0,barrier\nmain,barrier,Qubit 72,937,0,barrier\nmain,barrier,Qubit 73,937,0,barrier\nmain,barrier,Qubit 74,937,0,barrier\nmain,barrier,Qubit 75,937,0,barrier\nmain,barrier,Qubit 76,937,0,barrier\nmain,barrier,Qubit 77,937,0,barrier\nmain,barrier,Qubit 78,937,0,barrier\nmain,barrier,Qubit 79,937,0,barrier\nmain,barrier,Qubit 80,937,0,barrier\nmain,barrier,Qubit 81,937,0,barrier\nmain,barrier,Qubit 82,937,0,barrier\nmain,barrier,Qubit 83,937,0,barrier\nmain,barrier,Qubit 84,937,0,barrier\nmain,barrier,Qubit 85,937,0,barrier\nmain,barrier,Qubit 86,937,0,barrier\nmain,barrier,Qubit 87,937,0,barrier\nmain,barrier,Qubit 88,937,0,barrier\nmain,barrier,Qubit 89,937,0,barrier\nmain,barrier,Qubit 90,937,0,barrier\nmain,barrier,Qubit 91,937,0,barrier\nmain,barrier,Qubit 92,937,0,barrier\nmain,barrier,Qubit 93,937,0,barrier\nmain,barrier,Qubit 94,937,0,barrier\nmain,barrier,Qubit 95,937,0,barrier\nmain,barrier,Qubit 96,937,0,barrier\nmain,barrier,Qubit 97,937,0,barrier\nmain,barrier,Qubit 98,937,0,barrier\nmain,barrier,Qubit 99,937,0,barrier\nmain,barrier,Qubit 100,937,0,barrier\nmain,barrier,Qubit 101,937,0,barrier\nmain,barrier,Qubit 102,937,0,barrier\nmain,barrier,Qubit 103,937,0,barrier\nmain,barrier,Qubit 104,937,0,barrier\nmain,barrier,Qubit 105,937,0,barrier\nmain,barrier,Qubit 106,937,0,barrier\nmain,barrier,Qubit 107,937,0,barrier\nmain,barrier,Qubit 108,937,0,barrier\nmain,barrier,Qubit 109,937,0,barrier\nmain,barrier,Qubit 110,937,0,barrier\nmain,barrier,Qubit 111,937,0,barrier\nmain,barrier,Qubit 112,937,0,barrier\nmain,barrier,Qubit 113,937,0,barrier\nmain,barrier,Qubit 114,937,0,barrier\nmain,barrier,Qubit 115,937,0,barrier\nmain,barrier,Qubit 116,937,0,barrier\nmain,barrier,Qubit 117,937,0,barrier\nmain,barrier,Qubit 118,937,0,barrier\nmain,barrier,Qubit 119,937,0,barrier\nmain,barrier,Qubit 120,937,0,barrier\nmain,barrier,Qubit 121,937,0,barrier\nmain,barrier,Qubit 122,937,0,barrier\nmain,barrier,Qubit 123,937,0,barrier\nmain,barrier,Qubit 124,937,0,barrier\nmain,barrier,Qubit 125,937,0,barrier\nmain,barrier,Qubit 126,937,0,barrier\nmain,barrier,Qubit 127,937,0,barrier\nmain,barrier,Qubit 128,937,0,barrier\nmain,barrier,Qubit 129,937,0,barrier\nmain,barrier,Qubit 130,937,0,barrier\nmain,barrier,Qubit 131,937,0,barrier\nmain,barrier,Qubit 132,937,0,barrier\nmain,measure_0,Qubit 0,937,64,play\nmain,measure_0,Qubit 0,1001,72,play\nmain,measure_0,AWGR13_0,1048,240,capture\nmain,measure_0,Qubit 0,1073,64,play\nmain,barrier,Qubit 0,1484,0,barrier\nmain,barrier,Qubit 0,1484,0,barrier\nmain,barrier,Qubit 1,1484,0,barrier\nmain,barrier,Qubit 2,1484,0,barrier\nmain,barrier,Qubit 3,1484,0,barrier\nmain,barrier,Qubit 4,1484,0,barrier\nmain,barrier,Qubit 5,1484,0,barrier\nmain,barrier,Qubit 6,1484,0,barrier\nmain,barrier,Qubit 7,1484,0,barrier\nmain,barrier,Qubit 8,1484,0,barrier\nmain,barrier,Qubit 9,1484,0,barrier\nmain,barrier,Qubit 10,1484,0,barrier\nmain,barrier,Qubit 11,1484,0,barrier\nmain,barrier,Qubit 12,1484,0,barrier\nmain,barrier,Qubit 13,1484,0,barrier\nmain,barrier,Qubit 14,1484,0,barrier\nmain,barrier,Qubit 15,1484,0,barrier\nmain,barrier,Qubit 16,1484,0,barrier\nmain,barrier,Qubit 17,1484,0,barrier\nmain,barrier,Qubit 18,1484,0,barrier\nmain,barrier,Qubit 19,1484,0,barrier\nmain,barrier,Qubit 20,1484,0,barrier\nmain,barrier,Qubit 21,1484,0,barrier\nmain,barrier,Qubit 22,1484,0,barrier\nmain,barrier,Qubit 23,1484,0,barrier\nmain,barrier,Qubit 24,1484,0,barrier\nmain,barrier,Qubit 25,1484,0,barrier\nmain,barrier,Qubit 26,1484,0,barrier\nmain,barrier,Qubit 27,1484,0,barrier\nmain,barrier,Qubit 28,1484,0,barrier\nmain,barrier,Qubit 29,1484,0,barrier\nmain,barrier,Qubit 30,1484,0,barrier\nmain,barrier,Qubit 31,1484,0,barrier\nmain,barrier,Qubit 32,1484,0,barrier\nmain,barrier,Qubit 33,1484,0,barrier\nmain,barrier,Qubit 34,1484,0,barrier\nmain,barrier,Qubit 35,1484,0,barrier\nmain,barrier,Qubit 36,1484,0,barrier\nmain,barrier,Qubit 37,1484,0,barrier\nmain,barrier,Qubit 38,1484,0,barrier\nmain,barrier,Qubit 39,1484,0,barrier\nmain,barrier,Qubit 40,1484,0,barrier\nmain,barrier,Qubit 41,1484,0,barrier\nmain,barrier,Qubit 42,1484,0,barrier\nmain,barrier,Qubit 43,1484,0,barrier\nmain,barrier,Qubit 44,1484,0,barrier\nmain,barrier,Qubit 45,1484,0,barrier\nmain,barrier,Qubit 46,1484,0,barrier\nmain,barrier,Qubit 47,1484,0,barrier\nmain,barrier,Qubit 48,1484,0,barrier\nmain,barrier,Qubit 49,1484,0,barrier\nmain,barrier,Qubit 50,1484,0,barrier\nmain,barrier,Qubit 51,1484,0,barrier\nmain,barrier,Qubit 52,1484,0,barrier\nmain,barrier,Qubit 53,1484,0,barrier\nmain,barrier,Qubit 54,1484,0,barrier\nmain,barrier,Qubit 55,1484,0,barrier\nmain,barrier,Qubit 56,1484,0,barrier\nmain,barrier,Qubit 57,1484,0,barrier\nmain,barrier,Qubit 58,1484,0,barrier\nmain,barrier,Qubit 59,1484,0,barrier\nmain,barrier,Qubit 60,1484,0,barrier\nmain,barrier,Qubit 61,1484,0,barrier\nmain,barrier,Qubit 62,1484,0,barrier\nmain,barrier,Qubit 63,1484,0,barrier\nmain,barrier,Qubit 64,1484,0,barrier\nmain,barrier,Qubit 65,1484,0,barrier\nmain,barrier,Qubit 66,1484,0,barrier\nmain,barrier,Qubit 67,1484,0,barrier\nmain,barrier,Qubit 68,1484,0,barrier\nmain,barrier,Qubit 69,1484,0,barrier\nmain,barrier,Qubit 70,1484,0,barrier\nmain,barrier,Qubit 71,1484,0,barrier\nmain,barrier,Qubit 72,1484,0,barrier\nmain,barrier,Qubit 73,1484,0,barrier\nmain,barrier,Qubit 74,1484,0,barrier\nmain,barrier,Qubit 75,1484,0,barrier\nmain,barrier,Qubit 76,1484,0,barrier\nmain,barrier,Qubit 77,1484,0,barrier\nmain,barrier,Qubit 78,1484,0,barrier\nmain,barrier,Qubit 79,1484,0,barrier\nmain,barrier,Qubit 80,1484,0,barrier\nmain,barrier,Qubit 81,1484,0,barrier\nmain,barrier,Qubit 82,1484,0,barrier\nmain,barrier,Qubit 83,1484,0,barrier\nmain,barrier,Qubit 84,1484,0,barrier\nmain,barrier,Qubit 85,1484,0,barrier\nmain,barrier,Qubit 86,1484,0,barrier\nmain,barrier,Qubit 87,1484,0,barrier\nmain,barrier,Qubit 88,1484,0,barrier\nmain,barrier,Qubit 89,1484,0,barrier\nmain,barrier,Qubit 90,1484,0,barrier\nmain,barrier,Qubit 91,1484,0,barrier\nmain,barrier,Qubit 92,1484,0,barrier\nmain,barrier,Qubit 93,1484,0,barrier\nmain,barrier,Qubit 94,1484,0,barrier\nmain,barrier,Qubit 95,1484,0,barrier\nmain,barrier,Qubit 96,1484,0,barrier\nmain,barrier,Qubit 97,1484,0,barrier\nmain,barrier,Qubit 98,1484,0,barrier\nmain,barrier,Qubit 99,1484,0,barrier\nmain,barrier,Qubit 100,1484,0,barrier\nmain,barrier,Qubit 101,1484,0,barrier\nmain,barrier,Qubit 102,1484,0,barrier\nmain,barrier,Qubit 103,1484,0,barrier\nmain,barrier,Qubit 104,1484,0,barrier\nmain,barrier,Qubit 105,1484,0,barrier\nmain,barrier,Qubit 106,1484,0,barrier\nmain,barrier,Qubit 107,1484,0,barrier\nmain,barrier,Qubit 108,1484,0,barrier\nmain,barrier,Qubit 109,1484,0,barrier\nmain,barrier,Qubit 110,1484,0,barrier\nmain,barrier,Qubit 111,1484,0,barrier\nmain,barrier,Qubit 112,1484,0,barrier\nmain,barrier,Qubit 113,1484,0,barrier\nmain,barrier,Qubit 114,1484,0,barrier\nmain,barrier,Qubit 115,1484,0,barrier\nmain,barrier,Qubit 116,1484,0,barrier\nmain,barrier,Qubit 117,1484,0,barrier\nmain,barrier,Qubit 118,1484,0,barrier\nmain,barrier,Qubit 119,1484,0,barrier\nmain,barrier,Qubit 120,1484,0,barrier\nmain,barrier,Qubit 121,1484,0,barrier\nmain,barrier,Qubit 122,1484,0,barrier\nmain,barrier,Qubit 123,1484,0,barrier\nmain,barrier,Qubit 124,1484,0,barrier\nmain,barrier,Qubit 125,1484,0,barrier\nmain,barrier,Qubit 126,1484,0,barrier\nmain,barrier,Qubit 127,1484,0,barrier\nmain,barrier,Qubit 128,1484,0,barrier\nmain,barrier,Qubit 129,1484,0,barrier\nmain,barrier,Qubit 130,1484,0,barrier\nmain,barrier,Qubit 131,1484,0,barrier\nmain,barrier,Qubit 132,1484,0,barrier\nmain,broadcast,Hub,1048,436,broadcast\nmain,receive,Receive,1484,7,receive\nthen,x_0,Qubit 0,1499,8,play\nmain,barrier,Qubit 0,1516,0,barrier\nmain,barrier,Qubit 0,1516,0,barrier\nmain,barrier,Qubit 1,1516,0,barrier\nmain,barrier,Qubit 2,1516,0,barrier\nmain,barrier,Qubit 3,1516,0,barrier\nmain,barrier,Qubit 4,1516,0,barrier\nmain,barrier,Qubit 5,1516,0,barrier\nmain,barrier,Qubit 6,1516,0,barrier\nmain,barrier,Qubit 7,1516,0,barrier\nmain,barrier,Qubit 8,1516,0,barrier\nmain,barrier,Qubit 9,1516,0,barrier\nmain,barrier,Qubit 10,1516,0,barrier\nmain,barrier,Qubit 11,1516,0,barrier\nmain,barrier,Qubit 12,1516,0,barrier\nmain,barrier,Qubit 13,1516,0,barrier\nmain,barrier,Qubit 14,1516,0,barrier\nmain,barrier,Qubit 15,1516,0,barrier\nmain,barrier,Qubit 16,1516,0,barrier\nmain,barrier,Qubit 17,1516,0,barrier\nmain,barrier,Qubit 18,1516,0,barrier\nmain,barrier,Qubit 19,1516,0,barrier\nmain,barrier,Qubit 20,1516,0,barrier\nmain,barrier,Qubit 21,1516,0,barrier\nmain,barrier,Qubit 22,1516,0,barrier\nmain,barrier,Qubit 23,1516,0,barrier\nmain,barrier,Qubit 24,1516,0,barrier\nmain,barrier,Qubit 25,1516,0,barrier\nmain,barrier,Qubit 26,1516,0,barrier\nmain,barrier,Qubit 27,1516,0,barrier\nmain,barrier,Qubit 28,1516,0,barrier\nmain,barrier,Qubit 29,1516,0,barrier\nmain,barrier,Qubit 30,1516,0,barrier\nmain,barrier,Qubit 31,1516,0,barrier\nmain,barrier,Qubit 32,1516,0,barrier\nmain,barrier,Qubit 33,1516,0,barrier\nmain,barrier,Qubit 34,1516,0,barrier\nmain,barrier,Qubit 35,1516,0,barrier\nmain,barrier,Qubit 36,1516,0,barrier\nmain,barrier,Qubit 37,1516,0,barrier\nmain,barrier,Qubit 38,1516,0,barrier\nmain,barrier,Qubit 39,1516,0,barrier\nmain,barrier,Qubit 40,1516,0,barrier\nmain,barrier,Qubit 41,1516,0,barrier\nmain,barrier,Qubit 42,1516,0,barrier\nmain,barrier,Qubit 43,1516,0,barrier\nmain,barrier,Qubit 44,1516,0,barrier\nmain,barrier,Qubit 45,1516,0,barrier\nmain,barrier,Qubit 46,1516,0,barrier\nmain,barrier,Qubit 47,1516,0,barrier\nmain,barrier,Qubit 48,1516,0,barrier\nmain,barrier,Qubit 49,1516,0,barrier\nmain,barrier,Qubit 50,1516,0,barrier\nmain,barrier,Qubit 51,1516,0,barrier\nmain,barrier,Qubit 52,1516,0,barrier\nmain,barrier,Qubit 53,1516,0,barrier\nmain,barrier,Qubit 54,1516,0,barrier\nmain,barrier,Qubit 55,1516,0,barrier\nmain,barrier,Qubit 56,1516,0,barrier\nmain,barrier,Qubit 57,1516,0,barrier\nmain,barrier,Qubit 58,1516,0,barrier\nmain,barrier,Qubit 59,1516,0,barrier\nmain,barrier,Qubit 60,1516,0,barrier\nmain,barrier,Qubit 61,1516,0,barrier\nmain,barrier,Qubit 62,1516,0,barrier\nmain,barrier,Qubit 63,1516,0,barrier\nmain,barrier,Qubit 64,1516,0,barrier\nmain,barrier,Qubit 65,1516,0,barrier\nmain,barrier,Qubit 66,1516,0,barrier\nmain,barrier,Qubit 67,1516,0,barrier\nmain,barrier,Qubit 68,1516,0,barrier\nmain,barrier,Qubit 69,1516,0,barrier\nmain,barrier,Qubit 70,1516,0,barrier\nmain,barrier,Qubit 71,1516,0,barrier\nmain,barrier,Qubit 72,1516,0,barrier\nmain,barrier,Qubit 73,1516,0,barrier\nmain,barrier,Qubit 74,1516,0,barrier\nmain,barrier,Qubit 75,1516,0,barrier\nmain,barrier,Qubit 76,1516,0,barrier\nmain,barrier,Qubit 77,1516,0,barrier\nmain,barrier,Qubit 78,1516,0,barrier\nmain,barrier,Qubit 79,1516,0,barrier\nmain,barrier,Qubit 80,1516,0,barrier\nmain,barrier,Qubit 81,1516,0,barrier\nmain,barrier,Qubit 82,1516,0,barrier\nmain,barrier,Qubit 83,1516,0,barrier\nmain,barrier,Qubit 84,1516,0,barrier\nmain,barrier,Qubit 85,1516,0,barrier\nmain,barrier,Qubit 86,1516,0,barrier\nmain,barrier,Qubit 87,1516,0,barrier\nmain,barrier,Qubit 88,1516,0,barrier\nmain,barrier,Qubit 89,1516,0,barrier\nmain,barrier,Qubit 90,1516,0,barrier\nmain,barrier,Qubit 91,1516,0,barrier\nmain,barrier,Qubit 92,1516,0,barrier\nmain,barrier,Qubit 93,1516,0,barrier\nmain,barrier,Qubit 94,1516,0,barrier\nmain,barrier,Qubit 95,1516,0,barrier\nmain,barrier,Qubit 96,1516,0,barrier\nmain,barrier,Qubit 97,1516,0,barrier\nmain,barrier,Qubit 98,1516,0,barrier\nmain,barrier,Qubit 99,1516,0,barrier\nmain,barrier,Qubit 100,1516,0,barrier\nmain,barrier,Qubit 101,1516,0,barrier\nmain,barrier,Qubit 102,1516,0,barrier\nmain,barrier,Qubit 103,1516,0,barrier\nmain,barrier,Qubit 104,1516,0,barrier\nmain,barrier,Qubit 105,1516,0,barrier\nmain,barrier,Qubit 106,1516,0,barrier\nmain,barrier,Qubit 107,1516,0,barrier\nmain,barrier,Qubit 108,1516,0,barrier\nmain,barrier,Qubit 109,1516,0,barrier\nmain,barrier,Qubit 110,1516,0,barrier\nmain,barrier,Qubit 111,1516,0,barrier\nmain,barrier,Qubit 112,1516,0,barrier\nmain,barrier,Qubit 113,1516,0,barrier\nmain,barrier,Qubit 114,1516,0,barrier\nmain,barrier,Qubit 115,1516,0,barrier\nmain,barrier,Qubit 116,1516,0,barrier\nmain,barrier,Qubit 117,1516,0,barrier\nmain,barrier,Qubit 118,1516,0,barrier\nmain,barrier,Qubit 119,1516,0,barrier\nmain,barrier,Qubit 120,1516,0,barrier\nmain,barrier,Qubit 121,1516,0,barrier\nmain,barrier,Qubit 122,1516,0,barrier\nmain,barrier,Qubit 123,1516,0,barrier\nmain,barrier,Qubit 124,1516,0,barrier\nmain,barrier,Qubit 125,1516,0,barrier\nmain,barrier,Qubit 126,1516,0,barrier\nmain,barrier,Qubit 127,1516,0,barrier\nmain,barrier,Qubit 128,1516,0,barrier\nmain,barrier,Qubit 129,1516,0,barrier\nmain,barrier,Qubit 130,1516,0,barrier\nmain,barrier,Qubit 131,1516,0,barrier\nmain,barrier,Qubit 132,1516,0,barrier\nmain,measure_0,Qubit 0,1516,64,play\nmain,measure_0,Qubit 0,1580,72,play\nmain,measure_0,AWGR13_0,1627,240,capture\nmain,measure_0,Qubit 0,1652,64,play\nmain,barrier,Qubit 0,1906,0,barrier\nmain,barrier,Qubit 0,1906,0,barrier\nmain,barrier,Qubit 1,1906,0,barrier\nmain,barrier,Qubit 2,1906,0,barrier\nmain,barrier,Qubit 3,1906,0,barrier\nmain,barrier,Qubit 4,1906,0,barrier\nmain,barrier,Qubit 5,1906,0,barrier\nmain,barrier,Qubit 6,1906,0,barrier\nmain,barrier,Qubit 7,1906,0,barrier\nmain,barrier,Qubit 8,1906,0,barrier\nmain,barrier,Qubit 9,1906,0,barrier\nmain,barrier,Qubit 10,1906,0,barrier\nmain,barrier,Qubit 11,1906,0,barrier\nmain,barrier,Qubit 12,1906,0,barrier\nmain,barrier,Qubit 13,1906,0,barrier\nmain,barrier,Qubit 14,1906,0,barrier\nmain,barrier,Qubit 15,1906,0,barrier\nmain,barrier,Qubit 16,1906,0,barrier\nmain,barrier,Qubit 17,1906,0,barrier\nmain,barrier,Qubit 18,1906,0,barrier\nmain,barrier,Qubit 19,1906,0,barrier\nmain,barrier,Qubit 20,1906,0,barrier\nmain,barrier,Qubit 21,1906,0,barrier\nmain,barrier,Qubit 22,1906,0,barrier\nmain,barrier,Qubit 23,1906,0,barrier\nmain,barrier,Qubit 24,1906,0,barrier\nmain,barrier,Qubit 25,1906,0,barrier\nmain,barrier,Qubit 26,1906,0,barrier\nmain,barrier,Qubit 27,1906,0,barrier\nmain,barrier,Qubit 28,1906,0,barrier\nmain,barrier,Qubit 29,1906,0,barrier\nmain,barrier,Qubit 30,1906,0,barrier\nmain,barrier,Qubit 31,1906,0,barrier\nmain,barrier,Qubit 32,1906,0,barrier\nmain,barrier,Qubit 33,1906,0,barrier\nmain,barrier,Qubit 34,1906,0,barrier\nmain,barrier,Qubit 35,1906,0,barrier\nmain,barrier,Qubit 36,1906,0,barrier\nmain,barrier,Qubit 37,1906,0,barrier\nmain,barrier,Qubit 38,1906,0,barrier\nmain,barrier,Qubit 39,1906,0,barrier\nmain,barrier,Qubit 40,1906,0,barrier\nmain,barrier,Qubit 41,1906,0,barrier\nmain,barrier,Qubit 42,1906,0,barrier\nmain,barrier,Qubit 43,1906,0,barrier\nmain,barrier,Qubit 44,1906,0,barrier\nmain,barrier,Qubit 45,1906,0,barrier\nmain,barrier,Qubit 46,1906,0,barrier\nmain,barrier,Qubit 47,1906,0,barrier\nmain,barrier,Qubit 48,1906,0,barrier\nmain,barrier,Qubit 49,1906,0,barrier\nmain,barrier,Qubit 50,1906,0,barrier\nmain,barrier,Qubit 51,1906,0,barrier\nmain,barrier,Qubit 52,1906,0,barrier\nmain,barrier,Qubit 53,1906,0,barrier\nmain,barrier,Qubit 54,1906,0,barrier\nmain,barrier,Qubit 55,1906,0,barrier\nmain,barrier,Qubit 56,1906,0,barrier\nmain,barrier,Qubit 57,1906,0,barrier\nmain,barrier,Qubit 58,1906,0,barrier\nmain,barrier,Qubit 59,1906,0,barrier\nmain,barrier,Qubit 60,1906,0,barrier\nmain,barrier,Qubit 61,1906,0,barrier\nmain,barrier,Qubit 62,1906,0,barrier\nmain,barrier,Qubit 63,1906,0,barrier\nmain,barrier,Qubit 64,1906,0,barrier\nmain,barrier,Qubit 65,1906,0,barrier\nmain,barrier,Qubit 66,1906,0,barrier\nmain,barrier,Qubit 67,1906,0,barrier\nmain,barrier,Qubit 68,1906,0,barrier\nmain,barrier,Qubit 69,1906,0,barrier\nmain,barrier,Qubit 70,1906,0,barrier\nmain,barrier,Qubit 71,1906,0,barrier\nmain,barrier,Qubit 72,1906,0,barrier\nmain,barrier,Qubit 73,1906,0,barrier\nmain,barrier,Qubit 74,1906,0,barrier\nmain,barrier,Qubit 75,1906,0,barrier\nmain,barrier,Qubit 76,1906,0,barrier\nmain,barrier,Qubit 77,1906,0,barrier\nmain,barrier,Qubit 78,1906,0,barrier\nmain,barrier,Qubit 79,1906,0,barrier\nmain,barrier,Qubit 80,1906,0,barrier\nmain,barrier,Qubit 81,1906,0,barrier\nmain,barrier,Qubit 82,1906,0,barrier\nmain,barrier,Qubit 83,1906,0,barrier\nmain,barrier,Qubit 84,1906,0,barrier\nmain,barrier,Qubit 85,1906,0,barrier\nmain,barrier,Qubit 86,1906,0,barrier\nmain,barrier,Qubit 87,1906,0,barrier\nmain,barrier,Qubit 88,1906,0,barrier\nmain,barrier,Qubit 89,1906,0,barrier\nmain,barrier,Qubit 90,1906,0,barrier\nmain,barrier,Qubit 91,1906,0,barrier\nmain,barrier,Qubit 92,1906,0,barrier\nmain,barrier,Qubit 93,1906,0,barrier\nmain,barrier,Qubit 94,1906,0,barrier\nmain,barrier,Qubit 95,1906,0,barrier\nmain,barrier,Qubit 96,1906,0,barrier\nmain,barrier,Qubit 97,1906,0,barrier\nmain,barrier,Qubit 98,1906,0,barrier\nmain,barrier,Qubit 99,1906,0,barrier\nmain,barrier,Qubit 100,1906,0,barrier\nmain,barrier,Qubit 101,1906,0,barrier\nmain,barrier,Qubit 102,1906,0,barrier\nmain,barrier,Qubit 103,1906,0,barrier\nmain,barrier,Qubit 104,1906,0,barrier\nmain,barrier,Qubit 105,1906,0,barrier\nmain,barrier,Qubit 106,1906,0,barrier\nmain,barrier,Qubit 107,1906,0,barrier\nmain,barrier,Qubit 108,1906,0,barrier\nmain,barrier,Qubit 109,1906,0,barrier\nmain,barrier,Qubit 110,1906,0,barrier\nmain,barrier,Qubit 111,1906,0,barrier\nmain,barrier,Qubit 112,1906,0,barrier\nmain,barrier,Qubit 113,1906,0,barrier\nmain,barrier,Qubit 114,1906,0,barrier\nmain,barrier,Qubit 115,1906,0,barrier\nmain,barrier,Qubit 116,1906,0,barrier\nmain,barrier,Qubit 117,1906,0,barrier\nmain,barrier,Qubit 118,1906,0,barrier\nmain,barrier,Qubit 119,1906,0,barrier\nmain,barrier,Qubit 120,1906,0,barrier\nmain,barrier,Qubit 121,1906,0,barrier\nmain,barrier,Qubit 122,1906,0,barrier\nmain,barrier,Qubit 123,1906,0,barrier\nmain,barrier,Qubit 124,1906,0,barrier\nmain,barrier,Qubit 125,1906,0,barrier\nmain,barrier,Qubit 126,1906,0,barrier\nmain,barrier,Qubit 127,1906,0,barrier\nmain,barrier,Qubit 128,1906,0,barrier\nmain,barrier,Qubit 129,1906,0,barrier\nmain,barrier,Qubit 130,1906,0,barrier\nmain,barrier,Qubit 131,1906,0,barrier\nmain,barrier,Qubit 132,1906,0,barrier\nmain,barrier,Qubit 0,1906,0,barrier\n'

Finally, you can visualize and save the timing:

from qiskit_ibm_runtime.visualization import draw_circuit_schedule_timing
 
circuit_schedule = result[0].metadata["compilation"]["scheduler_timing"][
    "timing"
]
fig = draw_circuit_schedule_timing(
    circuit_schedule=circuit_schedule,
    included_channels=None,
    filter_readout_channels=False,
    filter_barriers=False,
    width=1000,
)
 
# Uncomment the following line to display the figure
# fig.show(renderer="notebook")
 
# Save to a file
# fig.write_html("scheduler_timing.html")

Next steps

Recommendations

Classical feedforward and control flow (dynamic circuits)
Visualize circuits

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