Processor types
Processor types are named for the general technology qualities that go into builds, consisting of the family and revision. Family (for example, Heron) refers to the size and scale of circuits possible on the chip. This is primarily determined by the number of qubits and the connectivity graph. Revisions (for example, r3) are design variants within a given family, often leading to performance improvements or tradeoffs.
To find the native gates and operations of a backend, use this code. You can see all native gates and operations in this table.
As new processor families are added, older families are retired. See the Retired processor families section to learn more.
Heron
At 156 qubits, Heron is an Eagle-sized upgrade to Egret that pulls in substantial innovations in signal delivery that were previously deployed in Osprey. The signals required to enable the fast, high-fidelity two-qubit and single-qubit control are delivered with high-density flex cabling.
r3 (July 2025) Heron r3 is the result of targeted manufacturing improvements that directly impact coherence, gate fidelity, and readout performance.
r2 (July 2024) This is a revision of the original Heron processor. The chip has been redesigned to include 156 qubits in a heavy-hexagonal lattice. While continuing to make use of the innovations of the original Heron processors, it also introduces a new TLS mitigation feature that controls the TLS environment of the chip, thereby improving coherence and stability across the whole chip.
r1 (December 2023) The first version of Heron with 133 qubits.